Alesis QS7.1 Service Manual download pdf (Page 21)

Alesis QS Series Keyboards Service Manual V1.00 11/19/06

Once pitch scaling is done, the SG ASIC similarly scales the amplitude of the data.

Again it must take into account such things as the sample’s natural envelope, the

Attack/Decay/Sustain/Release envelope provided for in the patch by the user, and any other

modulations necessary.

The “massaged” data is now ready to be passed along to the FX ASIC for further

processing and output. (See Sections 2.33, 2.40, and 2.20)

2.32B ROM Card Connector

Since Sound Cards serve the same function as the Sound ROMs, they are also

generically referred to as “Sound ROM”. The description of how the SG ASIC generates sound

from this is equally valid for both (see Section 2.32A). However, several extra lines exist to help

the H8 processor distinguish between Sound Cards and Sound ROM. This is especially

important as the H8 must be able write to the Sound card as well as read from it. CD1 and CD2

are used to inform the H8 of the presence and type of Sound Card inserted into the unit. In

addition, because the unit must be able to write to the Sound Card (as opposed to Sound ROM

which is read only) ReaD and WRite from the H8 are passed along via the SG ASIC SOE

SWR.. Since the QS7, QS8 and QSR have 2 ROM card slots all chip enable and card enable

lines must be duplicated (i.e. CE1, CE2).

2.33 The FX ASIC

The FX ASIC is one of Alesis’s custom digital signal processing ICs. Capable of up to 4

effects at once, this device is essentially a rack mount effects unit in a chip. The only other

essential major parts are memory for storing samples currently being manipulated, instructions

on what to do with the sound, and of course the sound data itself.

In the QS Series the Buffer DRAM is in the form of an HM514260AJ-7, a 4 Megabyte

70nS access part arranged as 16 bits X 256K words, for a maximum of approximately 5

seconds of sample time. This gives the FX ASIC plenty of room to create the convincingly

realistic sonic effects Alesis is famous for. The main control signals for the FX DRAM are RAS

(Row Address Strobe), CAS (Column Address Strobe), and WRN (WRite eNable). The 16 bit

data and 9 bit address busses operate the same as any standard micro processor.

Algorithm instructions are passed to the FX ASIC’s Writeable Control Store by the H8

processor via the memory mapped I/O process (See Section 2.31B).

In addition the FX ASIC is the last purely digital IC in the signal flow so the FX ASIC is

also responsible for DAC and Optical output (See Section 2.40).

2.33A QS7/8/R Digital Optical I/O

While the SG ASIC is capable of handling Optical I/O directly, all outside (via the optical

output jack J10 J8) communication is directed by the FX ASIC. In addition, the optical buss is

used internally to transfer data serially from the SG ASIC to the FX ASIC via the OPT_IN line

(pin 20). Output from EOPT_OUT (pin 19) is sent directly to the optical output jack.

2.34 The KEYSCAN ASIC

While the task of polling the keyboard may seem difficult at first (up to 88 Keys with

velocity), the Keyscan ASIC takes care of this task and passes the information back to the H8

processor . The main signals of the Keyscan ASIC are:

1 2 ... 16 17 18 19 20 21 22 23 24 25 26 ... 96 97

No comments

Alesis QS7.1 Service Manual Page 21